1. Field of the Invention
The present invention relates to a method of manufacturing a thin film transistor. More particularly, the present invention relates to a method of manufacturing a thin film transistor having a low threshold voltage and a low leakage current.
2. Description of the Related Art
Generally, a thin film transistor (TFT) includes a channel, a source region and drain region formed on opposite sides of the channel, and a gate formed on the channel.
The channel may be an n-type channel or a p-type channel, according to the dopant doped in the source/drain region. For example, in the case of a p-type channel, the dopant may be boron (B), and in the case of an n-type channel, the dopant may be phosphorus (P) or arsenic (As).
A conventional TFT has a structure in which a short channel is formed between the source and drain regions. Recently, a fin field effect transistor (FinFET) structure having multiple channels between the source and drain regions has been proposed. The FinFET may have a structure in which the source and drain regions are connected by silicon having both a relatively large thickness and a relatively narrow width, i.e. having a high aspect ratio of silicon thickness to width. This type of FinFET may have superior electrical characteristics, such as high electron mobility, a low threshold voltage, a low subthreshold swing and a low leakage current.
Conventionally, the manufacture of a TFT having a FinFET structure (FinFET structure TFT) requires that a thin film process be performed on a silicon on insulator (SOI) substrate. This is because the material for forming the channel must be a single crystal silicon layer in order to increase the electron mobility through the channel. That is, if a single crystal silicon layer is not used for forming a channel having a relatively narrow width, the electrical characteristics of the channel may be reduced, and the driving voltage and threshold voltage may be increased.
The SOI substrate typically has a structure in which a silicon single crystal is formed on an insulating film. Typically, the manufacturing cost of devices built on the SOI substrate is high, since the SOI substrate is expensive. Furthermore, the thickness of the silicon single crystal is typically much smaller than the width of the channel, and thus it is difficult to produce a channel having a high aspect ratio of thickness to width.
Therefore, there is a need for a method of manufacturing a thin film TFT having improved electrical characteristics and having an improved ratio of silicon thickness to width, without using a single crystal silicon layer.